cnt15_rtl.vhd 583 Bytes
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library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

-- Loadable downcounter which stops when cnt is 0
-- The done_o output is 1, when cnt is 0;
-- When ld_i is '1', the counter is loaded with a startvalue of 13
-- The cnt_o output shows the current value of the counter

entity cnt15 is 
port ( clk    : in      std_ulogic;
       rst_n  : in      std_ulogic; 
       ld_i   : in      std_ulogic;
       done_o : out     std_ulogic;
       cnt_o  : out     std_ulogic_vector(3 downto 0)); 
end entity;

architecture rtl of cnt15 is 

begin
  
end architecture rtl;