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Friedrich Beckmann
digitaltechnikpraktikum
Commits
337433f1
Commit
337433f1
authored
Jul 15, 2013
by
Johann Faerber
Browse files
deleted old files from scripts directory
parent
a89f837b
Changes
4
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scripts/de1_binto7segment_pins.tcl
deleted
100755 → 0
View file @
a89f837b
# assign pin locations to an existing quartus project
# expects project name as command line parameter
# e.g.
# quartus_sh -t de1_mux2to1_pins.tcl -projectname de1_mux2to1
#
package require cmdline
set parameters
{
{
projectname.arg
""
"Project Name"
}
}
array set arg
[
::cmdline::getoptions argv $parameters
]
if
{[
project_exists $arg
(
projectname
)]}
{
project_open $arg
(
projectname
)
# ----------------------------------------------------------------------------
# Pin Assignments
set_location_assignment PIN_L22 -to SW
[
0
]
set_location_assignment PIN_L21 -to SW
[
1
]
set_location_assignment PIN_M22 -to SW
[
2
]
set_location_assignment PIN_V12 -to SW
[
3
]
set_location_assignment PIN_R20 -to LEDR
[
0
]
set_location_assignment PIN_R19 -to LEDR
[
1
]
set_location_assignment PIN_U19 -to LEDR
[
2
]
set_location_assignment PIN_Y19 -to LEDR
[
3
]
set_location_assignment PIN_J2 -to HEX0
[
0
]
set_location_assignment PIN_J1 -to HEX0
[
1
]
set_location_assignment PIN_H2 -to HEX0
[
2
]
set_location_assignment PIN_H1 -to HEX0
[
3
]
set_location_assignment PIN_F2 -to HEX0
[
4
]
set_location_assignment PIN_F1 -to HEX0
[
5
]
set_location_assignment PIN_E2 -to HEX0
[
6
]
# ----------------------------------------------------------------------------
# Close project
project_close
}
else
{
puts
"Project Name not specified !"
exit 1
}
scripts/makefile.modelsim_template
deleted
100755 → 0
View file @
a89f837b
## ----------------------------------------------------------------------------
## Script : makefile
## ----------------------------------------------------------------------------
## Author : Johann Faerber
## Company : University of Applied Sciences Augsburg
## ----------------------------------------------------------------------------
## Description: see end of file
## ----------------------------------------------------------------------------
###################################################################
# Project Configuration:
#
# Prerequisite: mandatory design directory structure (see end of file)
#
# - modify and copy it to sim/(PROJECT)/makefile
# - Specify the name of the design (PROJECT)
# - and the list of source files used (SOURCE_FILES)
###################################################################
PROJECT
=
mux2to1
SOURCE_FILES
=
\
../../src/and2gate_equation.vhd
\
../../src/or2gate_equation.vhd
\
../../src/invgate_equation.vhd
\
../../src/$(PROJECT)_structure.vhd
\
../../src/t_$(PROJECT).vhd
###################################################################
# Main Targets
#
###################################################################
help
:
@
echo
'"make" does intentionally nothing. Type:'
@
echo
' "make mproject" to create a new modelsim project'
@
echo
' "make compile" to compile all VHDL sources in batch mode'
@
echo
' "make modelsim" to start modelsim with graphical user interface'
@
echo
' "make sim" to start modelsim gui with the top testbench of the project'
@
echo
' "make clean" to remove all generated files'
mproject
:
# create modelsim project
vsim
-modelsimini
../../scripts/modelsim.ini
-c
-do
"project new [pwd]
$(PROJECT)
; quit -f"
# assign VHDL design files
for
source_file
in
$(SOURCE_FILES)
;
do
\
vsim
-c
-do
"project open
$(PROJECT)
; project addfile
$$
source_file; quit -f"
;
\
done
compile
:
vsim
-c
-do
"project open
$(PROJECT)
; project calculateorder; quit -f"
modelsim
:
vsim
$(PROJECT)
&
sim
:
vsim
-do
"project open
$(PROJECT)
; vsim work.t_
$(PROJECT)
(tbench); add wave *; run -a;"
&
clean
:
rm
-rf
*
.mpf
*
.mti
*
.ini
*
.wlf wlf
*
transcript work
## ----------------------------------------------------------------------------
## Description:
## ------------
## assumes the following design directory structure as prerequisite
##
## DigitaltechnikPraktikum
## |
## +---src
## | and2gate_equation.vhd
## | de1_mux2to1_structure.vhd
## | invgate_equation.vhd
## | mux2to1_structure.vhd
## | or2gate_equation.vhd
## | t_mux2to1.vhd
## |
## +---pnr
## | +---de1_mux2to1
## | makefile
## | de1_mux2to1.qpf
## | de1_mux2to1.qpf
## |
## +---scripts
## | quartus_project_settings.tcl
## | makefile.quartus_template
## | makefile.modelsim_template
## | de1_mux2to1_pins.tcl
## | modelsim_project_settings.tcl
## | modelsim.ini
## | de1_pin_assignments_minimumio.csv
## | de1_pin_assignments_minimumio.tcl
## |
## \---sim
## +---mux2to1
## makefile
## mux2to1.mpf
## modelsim.ini
##
## ----------------------------------------------------------------------------
## Modifications: makefile template from Altera Quartus scripting modified:
## --------------
## - added help target
## - make project to create a new modelsim project
## - make modelsim to start modelsim with graphical user interface
## - make sim to start modelsim gui with the top testbench of the project
## - make compile to compile all VHDL sources in batch mode
## ----------------------------------------------------------------------------
## Revisions:
## ----------
## $Id:$
## ----------------------------------------------------------------------------
scripts/makefile.quartus_template
deleted
100755 → 0
View file @
a89f837b
## ----------------------------------------------------------------------------
## Script : makefile
## ----------------------------------------------------------------------------
## Author : Johann Faerber
## Company : University of Applied Sciences Augsburg
## ----------------------------------------------------------------------------
## Description: see end of file
## ----------------------------------------------------------------------------
###################################################################
# Project Configuration:
#
# Prerequisite: - mandatory design directory structure (see end of file)
# - scripts/quartus_project_settings.tcl
# - scripts/de1_$(PROJECT)_pins.tcl
#
# - modify and copy it to pnr/de1_(PROJECT)/makefile
# - specify the name of the design (PROJECT)
# - and the list of source files used (SOURCE_FILES)
###################################################################
PROTOTYPE
=
de1
PROJECT
=
de1_mux2to1
SOURCE_FILES
=
\
../../src/and2gate_equation.vhd
\
../../src/or2gate_equation.vhd
\
../../src/invgate_equation.vhd
\
../../src/mux2to1_structure.vhd
\
../../src/$(PROJECT)_structure.vhd
ASSIGNMENT_FILES
=
$(PROJECT)
.qpf
$(PROJECT)
.qsf
###################################################################
# Main Targets
#
###################################################################
help
:
@
echo
'"make" does intentionally nothing. Type:'
@
echo
' "make qproject" to create a new quartus project'
@
echo
' "make compile" to process through all design steps: map, fit, asm'
@
echo
' "make prog" to configure programmable device'
@
echo
' "make quartus" to start quartus graphical user interface'
@
echo
' "make clean" to remove all generated files'
compile
:
smart.log $(PROJECT).asm.rpt
qproject
:
# create quartus project
quartus_sh
-t
../../scripts/quartus_project_settings.tcl
-projectname
$(PROJECT)
# assign VHDL design files
for
source_file
in
$(SOURCE_FILES)
;
do
\
quartus_sh
--set
VHDL_FILE
=
$$
source_file
$(PROJECT)
;
\
done
# assign pins
$
if
[
-f
../../scripts/
$(PROJECT)
_pins.tcl
]
;
then
quartus_sh
-t
../../scripts/
$(PROJECT)
_pins.tcl
-projectname
$(PROJECT)
;
fi
clean
:
rm
-rf
*
.rpt
*
.chg smart.log
*
.htm
*
.eqn
*
.pin
*
.sof
*
.pof db incremental_db
*
.qpf
*
.qsf
*
.summary
$(PROJECT)
.
*
map
:
smart.log $(PROJECT).map.rpt
fit
:
smart.log $(PROJECT).fit.rpt
asm
:
smart.log $(PROJECT).asm.rpt
smart
:
smart.log
prog
:
quartus_pgm
-c
USB-Blaster
--mode
jtag
--operation
=
"p;
$(PROJECT)
.sof"
quartus
:
# create quartus project
quartus
$(PROJECT)
.qpf &
###################################################################
# Target implementations
###################################################################
STAMP
=
echo
done
>
$(PROJECT).map.rpt
:
map.chg $(SOURCE_FILES)
quartus_map
$(PROJECT)
$(STAMP)
fit.chg
$(PROJECT).fit.rpt
:
fit.chg $(PROJECT).map.rpt
quartus_fit
$(PROJECT)
$(STAMP)
asm.chg
$(STAMP)
sta.chg
$(PROJECT).asm.rpt
:
asm.chg $(PROJECT).fit.rpt
quartus_asm
$(ASM_ARGS)
$(PROJECT)
smart.log
:
$(ASSIGNMENT_FILES)
quartus_sh
--determine_smart_action
$(PROJECT)
>
smart.log
###################################################################
# Project initialization
###################################################################
$(ASSIGNMENT_FILES)
:
quartus_sh
--prepare
$(PROJECT)
map.chg
:
$(STAMP)
map.chg
fit.chg
:
$(STAMP)
fit.chg
asm.chg
:
$(STAMP)
asm.chg
## ----------------------------------------------------------------------------
## Description:
## ------------
## assumes the following design directory structure as prerequisite
##
## DigitaltechnikPraktikum
## |
## +---src
## | and2gate_equation.vhd
## | de1_mux2to1_structure.vhd
## | invgate_equation.vhd
## | mux2to1_structure.vhd
## | or2gate_equation.vhd
## | t_mux2to1.vhd
## |
## +---pnr
## | +---de1_mux2to1
## | makefile
## | de1_mux2to1.qpf
## | de1_mux2to1.qpf
## |
## +---scripts
## | quartus_project_settings.tcl
## | makefile.quartus_template
## | makefile.modelsim_template
## | de1_mux2to1_pins.tcl
## | modelsim_project_settings.tcl
## | modelsim.ini
## | de1_pin_assignments_minimumio.csv
## | de1_pin_assignments_minimumio.tcl
## |
## \---sim
## +---mux2to1
## makefile
## mux2to1.mpf
## modelsim.ini
##
## ----------------------------------------------------------------------------
## Modifications: makefile template from Altera Quartus scripting modified:
## --------------
## - added help target
## - removed target for timing analysis
## - added target project for initial creation of a quartus project
## - modified target all to compile
## - modified target clean to remove quartus project files *.qpf *.qfs
## - added target prog to configure a programmable device
## - added target quartus to start quartus graphical user interface
## ----------------------------------------------------------------------------
## Revisions:
## ----------
## $Id:$
## ----------------------------------------------------------------------------
sim/mux2to1/makefile.orig
deleted
100755 → 0
View file @
a89f837b
## ----------------------------------------------------------------------------
## Script : makefile
## ----------------------------------------------------------------------------
## Author : Johann Faerber
## Company : University of Applied Sciences Augsburg
## ----------------------------------------------------------------------------
## Description: see end of file
## ----------------------------------------------------------------------------
###################################################################
# Project Configuration:
#
# Prerequisite: mandatory design directory structure (see end of file)
#
# - modify and copy it to sim/(PROJECT)/makefile
# - Specify the name of the design (PROJECT)
# - and the list of source files used (SOURCE_FILES)
###################################################################
PROJECT
=
mux2to1
SOURCE_FILES
=
\
../../src/and2gate_equation.vhd
\
../../src/or2gate_equation.vhd
\
../../src/invgate_equation.vhd
\
../../src/$(PROJECT)_structure.vhd
\
../../src/t_$(PROJECT).vhd
###################################################################
# Main Targets
#
###################################################################
help
:
@
echo
'"make" does intentionally nothing. Type:'
@
echo
' "make mproject" to create a new modelsim project'
@
echo
' "make compile" to compile all VHDL sources in batch mode'
@
echo
' "make modelsim" to start modelsim with graphical user interface'
@
echo
' "make sim" to start modelsim gui with the top testbench of the project'
@
echo
' "make clean" to remove all generated files'
mproject
:
# create modelsim project
vsim
-modelsimini
../../scripts/modelsim.ini
-c
-do
"project new [pwd]
$(PROJECT)
; quit -f"
# assign VHDL design files
for
source_file
in
$(SOURCE_FILES)
;
do
\
vsim
-c
-do
"project open
$(PROJECT)
; project addfile
$$
source_file; quit -f"
;
\
done
compile
:
vsim
-c
-do
"project open
$(PROJECT)
; project calculateorder; quit -f"
modelsim
:
vsim
$(PROJECT)
sim
:
vsim
-do
"project open
$(PROJECT)
; vsim work.t_
$(PROJECT)
(tbench); add wave *; run -a;"
clean
:
rm
-rf
*
.mpf
*
.mti
*
.ini
*
.wlf wlf
*
transcript work
## ----------------------------------------------------------------------------
## Description:
## ------------
## assumes the following design directory structure as prerequisite
##
## DigitaltechnikPraktikum
## |
## +---src
## | and2gate_equation.vhd
## | de1_mux2to1_structure.vhd
## | invgate_equation.vhd
## | mux2to1_structure.vhd
## | or2gate_equation.vhd
## | t_mux2to1.vhd
## |
## +---pnr
## | +---de1_mux2to1
## | makefile
## | de1_mux2to1.qpf
## | de1_mux2to1.qpf
## |
## +---scripts
## | quartus_project_settings.tcl
## | makefile.quartus_template
## | makefile.modelsim_template
## | de1_mux2to1_pins.tcl
## | modelsim_project_settings.tcl
## | modelsim.ini
## | de1_pin_assignments_minimumio.csv
## | de1_pin_assignments_minimumio.tcl
## |
## \---sim
## +---mux2to1
## makefile
## mux2to1.mpf
## modelsim.ini
##
## ----------------------------------------------------------------------------
## Modifications: makefile template from Altera Quartus scripting modified:
## --------------
## - added help target
## - make project to create a new modelsim project
## - make modelsim to start modelsim with graphical user interface
## - make sim to start modelsim gui with the top testbench of the project
## - make compile to compile all VHDL sources in batch mode
## ----------------------------------------------------------------------------
## Revisions:
## ----------
## $Id:$
## ----------------------------------------------------------------------------
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