added support for different FPGA families and devices in

create_quartus_project_settings.tcl

necessary changes in pnr/makefile and sim/makefile

pnr/de1_add1/makefile

@@ -23,6 +23,20 @@
 SIM_PROJECT_NAME = add1
 PROJECT = de1_$(SIM_PROJECT_NAME)
 
+# Prototype Board FPGA family and device settings
+# DE1
+FAMILY = "Cyclone II"
+DEVICE = EP2C20F484C7
+# DEMMK
+#FAMILY = "MAX II"
+#DEVICE = EPM2210F324C3
+# DE2
+#FAMILY = "Cyclone II"
+#DEVICE = EP2C35F484C7
+# DE0
+#FAMILY = "Cyclone IV E"
+#DEVICE = EP4CE22F17C6
+
 # Here the VHDL files for synthesis are defined. 
 include ../../sim/$(SIM_PROJECT_NAME)/makefile.sources
 

pnr/de1_add4/makefile

@@ -23,6 +23,20 @@
 SIM_PROJECT_NAME = add4
 PROJECT = de1_$(SIM_PROJECT_NAME)
 
+# Prototype Board FPGA family and device settings
+# DE1
+FAMILY = "Cyclone II"
+DEVICE = EP2C20F484C7
+# DEMMK
+#FAMILY = "MAX II"
+#DEVICE = EPM2210F324C3
+# DE2
+#FAMILY = "Cyclone II"
+#DEVICE = EP2C35F484C7
+# DE0
+#FAMILY = "Cyclone IV E"
+#DEVICE = EP4CE22F17C6
+
 # Here the VHDL files for synthesis are defined. 
 include ../../sim/$(SIM_PROJECT_NAME)/makefile.sources
 

pnr/de1_binto7segment/makefile

@@ -23,6 +23,20 @@
 SIM_PROJECT_NAME = binto7segment
 PROJECT = de1_$(SIM_PROJECT_NAME)
 
+# Prototype Board FPGA family and device settings
+# DE1
+FAMILY = "Cyclone II"
+DEVICE = EP2C20F484C7
+# DEMMK
+#FAMILY = "MAX II"
+#DEVICE = EPM2210F324C3
+# DE2
+#FAMILY = "Cyclone II"
+#DEVICE = EP2C35F484C7
+# DE0
+#FAMILY = "Cyclone IV E"
+#DEVICE = EP4CE22F17C6
+
 # Here the VHDL files for synthesis are defined. 
 include ../../sim/$(SIM_PROJECT_NAME)/makefile.sources
 

pnr/de1_cntdn/makefile

@@ -23,6 +23,20 @@
 SIM_PROJECT_NAME = cntdn
 PROJECT = de1_$(SIM_PROJECT_NAME)
 
+# Prototype Board FPGA family and device settings
+# DE1
+FAMILY = "Cyclone II"
+DEVICE = EP2C20F484C7
+# DEMMK
+#FAMILY = "MAX II"
+#DEVICE = EPM2210F324C3
+# DE2
+#FAMILY = "Cyclone II"
+#DEVICE = EP2C35F484C7
+# DE0
+#FAMILY = "Cyclone IV E"
+#DEVICE = EP4CE22F17C6
+
 # Here the VHDL files for synthesis are defined. 
 include ../../sim/$(SIM_PROJECT_NAME)/makefile.sources
 

pnr/de1_cntupen/makefile

@@ -23,6 +23,20 @@
 SIM_PROJECT_NAME = cntupen
 PROJECT = de1_$(SIM_PROJECT_NAME)
 
+# Prototype Board FPGA family and device settings
+# DE1
+FAMILY = "Cyclone II"
+DEVICE = EP2C20F484C7
+# DEMMK
+#FAMILY = "MAX II"
+#DEVICE = EPM2210F324C3
+# DE2
+#FAMILY = "Cyclone II"
+#DEVICE = EP2C35F484C7
+# DE0
+#FAMILY = "Cyclone IV E"
+#DEVICE = EP4CE22F17C6
+
 # Here the VHDL files for synthesis are defined. 
 include ../../sim/$(SIM_PROJECT_NAME)/makefile.sources
 

pnr/de1_cntupen_1sec/makefile

@@ -22,6 +22,19 @@
 
 SIM_PROJECT_NAME = cntupen
 PROJECT = de1_$(SIM_PROJECT_NAME)_1sec
+# Prototype Board FPGA family and device settings
+# DE1
+FAMILY = "Cyclone II"
+DEVICE = EP2C20F484C7
+# DEMMK
+#FAMILY = "MAX II"
+#DEVICE = EPM2210F324C3
+# DE2
+#FAMILY = "Cyclone II"
+#DEVICE = EP2C35F484C7
+# DE0
+#FAMILY = "Cyclone IV E"
+#DEVICE = EP4CE22F17C6
 
 # Here the VHDL files for synthesis are defined. 
 include ../../sim/$(SIM_PROJECT_NAME)/makefile.sources

pnr/de1_cntupen_step/makefile

@@ -23,6 +23,20 @@
 SIM_PROJECT_NAME = cntupen
 PROJECT = de1_$(SIM_PROJECT_NAME)_step
 
+# Prototype Board FPGA family and device settings
+# DE1
+FAMILY = "Cyclone II"
+DEVICE = EP2C20F484C7
+# DEMMK
+#FAMILY = "MAX II"
+#DEVICE = EPM2210F324C3
+# DE2
+#FAMILY = "Cyclone II"
+#DEVICE = EP2C35F484C7
+# DE0
+#FAMILY = "Cyclone IV E"
+#DEVICE = EP4CE22F17C6
+
 # Here the VHDL files for synthesis are defined. 
 include ../../sim/$(SIM_PROJECT_NAME)/makefile.sources
 

pnr/de1_mux2to1/makefile

@@ -23,6 +23,20 @@
 SIM_PROJECT_NAME = mux2to1
 PROJECT = de1_$(SIM_PROJECT_NAME)
 
+# Prototype Board FPGA family and device settings
+# DE1
+FAMILY = "Cyclone II"
+DEVICE = EP2C20F484C7
+# DEMMK
+#FAMILY = "MAX II"
+#DEVICE = EPM2210F324C3
+# DE2
+#FAMILY = "Cyclone II"
+#DEVICE = EP2C35F484C7
+# DE0
+#FAMILY = "Cyclone IV E"
+#DEVICE = EP4CE22F17C6
+
 # Here the VHDL files for synthesis are defined. 
 include ../../sim/$(SIM_PROJECT_NAME)/makefile.sources
 

pnr/makefile

@@ -31,7 +31,7 @@ flowsummary.log: $(SOURCE_FILES)
 		echo set_global_assignment -name VHDL_FILE $$source_file >> quartus_vhdl_source_files.tcl; \
 	done
 	# create and compile quartus project
-	quartus_sh -t ../../scripts/quartus_project_settings.tcl -projectname $(PROJECT)
+	quartus_sh -t ../../scripts/quartus_project_settings.tcl -projectname $(PROJECT) -family $(FAMILY) -device $(DEVICE)
 
 clean:
 	rm -rf *.rpt *.chg *.log quartus_vhdl_source_files.tcl *.htm *.eqn *.pin *.sof *.pof db incremental_db *.qpf *.qsf *.summary $(PROJECT).*

scripts/quartus_project_settings.tcl

@@ -9,6 +9,7 @@
 ##              expects project name as command line parameter 
 ##              e.g.
 ##              quartus_sh -t quartus_project_settings.tcl -projectname de1_mux2to1
+##                         -family 
 ## ----------------------------------------------------------------------------
 ## Revisions  : see end of file
 ## ----------------------------------------------------------------------------
@@ -19,24 +20,29 @@ package require ::quartus::project
 
 set parameters {
     {projectname.arg ""   "Project Name"}
+	{family.arg ""   "FPGA Family"}
+	{device.arg ""   "FPGA Device"}
 }
 array set arg [::cmdline::getoptions argv $parameters]
 
-# check, if project name is not an empty string
-if {[string equal "" $arg(projectname)]} {
+# Verify required paramters
+set requiredParameters {projectname family device}
+foreach parameter $requiredParameters {
+    if {$arg($parameter) == ""} {
+        puts stderr "Missing required parameter: -$parameter"
+        exit 1
+    }
+}
 
-	puts "Project Name not specified !"
-	exit 1
 
-} else {
 
 	# Create project
 	project_new $arg(projectname) -overwrite
 	
 	# ----------------------------------------------------------------------------
 	# Assign family, device, and top-level file
-	set_global_assignment -name FAMILY "Cyclone II"
-	set_global_assignment -name DEVICE EP2C20F484C7
+	set_global_assignment -name FAMILY $arg(family)
+	set_global_assignment -name DEVICE $arg(device)
 	
 	# ----------------------------------------------------------------------------
 	# Default settings
@@ -72,7 +78,7 @@ if {[string equal "" $arg(projectname)]} {
 	# Close project
 	project_close
 
-}
+
 ## ----------------------------------------------------------------------------
 ## Revisions:
 ## ----------

sim/makefile

@@ -38,7 +38,8 @@ compile: ./work/_vmake
 	vsim -c -do "project open $(PROJECT); project calculateorder; quit -f"
 
 modelsim: ./work/_vmake
-	vsim -i $(PROJECT) &
+	# vsim -i $(PROJECT) &
+	vsim -i -do "project open $(PROJECT); " &
 
 sim: ./work/_vmake
 	vsim -i -do "project open $(PROJECT); vsim work.t_$(PROJECT)(tbench); add wave *; run -a;" &