modified synthesis targets

pnr/makefile

@@ -16,13 +16,12 @@
 
 help:
 	@echo '"make" does intentionally nothing. Type:'
-	@echo '  "make qproject" to create a new quartus project'
-	@echo '  "make compile" to process through all design steps: map, fit, asm'
+	@echo '  "make compile" synthesize the design'
 	@echo '  "make prog" to configure programmable device'
 	@echo '  "make quartus" to start quartus graphical user interface'
 	@echo '  "make clean" to remove all generated files'
 
-qproject: flowsummary.log
+compile: flowsummary.log
 
 flowsummary.log: $(SOURCE_FILES)  
 	# assign VHDL design files