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For the first simple labs the simulator seems to be useless
because the function is so simple.

with this change the sdc file target can be overwritten in the
project specific makefile.

The original design of the audio echo example runs with 8 kHz
sampling frequency for longer echo time. I changed this to 48 kHz
sampling frequency. Changed the system clock from 24 MHz to 50 MHz
to have default timing constraints.

Based on the echo example I build an audio interface which provides
the audio interface with parallel data.

changing makefile.sources did not restart the modelsim project setup
process. I added makefile.sources to the list of dependencies.

in all design projects of lab #3

hence, adding add1(truthtable) to the makefile.sources

pnr/de1_mux2to1/de1_mux2to1_pins.qsf
pnr/de1_binto7segment/de1_binto7segment_pin.qsf

as a format for importing pin assignments manually

pnr/de1_mux2to1/de1_mux2to1.qpf
pnr/de1_mux2to1/de1_mux2to1.qsf