Commit 7644dfd5 authored by Friedrich Beckmann's avatar Friedrich Beckmann
Browse files

added signal q as std_ulogic_vector

parent 6cb5fbea
......@@ -7,6 +7,7 @@ end;
architecture rtl of mclk is
signal d : std_ulogic;
signal k : integer range 0 to 15;
signal q : std_ulogic_vector(3 downto 0);
begin
end architecture;
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