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Friedrich Beckmann
gitdemo
Commits
79fa691c
Commit
79fa691c
authored
Mar 25, 2021
by
Friedrich Beckmann
Browse files
changed signal name to z
parent
7644dfd5
Changes
1
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mclk.vhd
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79fa691c
...
...
@@ -7,7 +7,7 @@ end;
architecture
rtl
of
mclk
is
signal
d
:
std_ulogic
;
signal
k
:
integer
range
0
to
15
;
signal
q
:
std_ulogic_vector
(
3
downto
0
);
signal
z
:
std_ulogic_vector
(
3
downto
0
);
begin
end
architecture
;
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