Commit 39a442a7 authored by Aaron Erhardt's avatar Aaron Erhardt
Browse files

Add exceptions and interrupts

Signed-off-by: default avatarAaron Erhardt <>
parent beeb5abe
Pipeline #547 passed with stage
in 1 minute and 43 seconds
......@@ -326,3 +326,65 @@ CCR1-CCR4 registers:
+ compare with counter value and set output pin if counter surpasses the control value
+ on input (e. g. rising edge) capture the current counter value
# Exceptions
Subroutines that are executed automatically by the CPU when certain events occur.
## Setup
The CPU looks up addresses to subroutines for exception in a vector table. When an exception occurs it runs the subroutine at the specified address.
## Causes
### Software interrupts
Calling exceptions manually. Can be used to
+ test interrupt routines
+ call operating system functions (supervisor call)
### Traps
Exceptions caused by the programmer that appear at run-time
+ Divide by zero
+ Invalid instruction code
+ Invalid address
+ Privilege violation
### External
+ Invalid memory access (buserror)
+ Reset (e. g. by the reset button)
+ Interrupt was activated
## Interrupts
Interrupts work similar to exceptions but are triggered by an external source.
Maskable interrupts can be explicitly enabled or disabled. Not maskable interrupts cannot be disabled.
### Running order
+ I/O-block sets interrupt request signal (IRQ)
+ After executing the current instruction the CPU checks for interrupts
+ CPU checks if interrupt is enabled (IntEnable)
+ CPU stores program counter and status registers on the stack
+ CPU sets interrupt acknowledgment signal (IntAck)
+ I/O-block puts vector number on the bus
+ CPU reads vector number and looks up the position in the vector table
+ CPU reads start-address of the interrupt routine from the vector table
+ CPU resets IntAck
+ I/O-block resets IRQ
+ CPU runs the interrupt routine
### Concurrent interrupts
**Daisy Chain (forward IntAck in a chain)**
+ Connect IRQ with logical OR
+ IntAck is only sent to one I/O-block.
+ Each block only forwards IntAck if it doesn't want to run an interrupt itself.
+ This creates a (geographically) prioritized chain that guarantees that only one interrupt is executed at a time
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