Commit 4d647c2c authored by root's avatar root
Browse files

erste änderung der mclk datei

Hier wird fast nix geöndert
parents
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
-- Adder with configurable width
entity adder is
port (
a_i : in std_ulogic_vector(11 downto 0);
b_i : in std_ulogic_vector(11 downto 0);
y_o : out std_ulogic_vector(11 downto 0)
);
end;
architecture rtl of adder is
begin
y_o <= std_ulogic_vector(unsigned(a_i) + unsigned(b_i));
end; -- architecture
Markdown is supported
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment