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Commit 063f1c58 authored by Manuel Mikschl's avatar Manuel Mikschl
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Comm: audio_mixer matlab

parent c6979d69
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Showing with 16610 additions and 58 deletions
matlab/audio/hdl_prj/hdlsrc/audio_first_sin/ml_audio_map.txt deleted 100644 → 0
View file @ c6979d69
--> ml_audio_pkg
audio_first_sin/ml_audio/Sine HDL Optimized --> Sine_HDL_Optimized
audio_first_sin/ml_audio --> ml_audio
matlab/audio/hdl_prj/hdlsrc/audio_first_sin/Sine_HDL_Optimized.vhd → matlab/audio/hdl_prj/hdlsrc/audio_mixer/Sine_HDL_Optimized1.vhd
View file @ 063f1c58
-- -------------------------------------------------------------
--
-- File Name: hdl_prj/hdlsrc/audio_first_sin/Sine_HDL_Optimized.vhd
-- Created: 2021-04-14 10:22:39
-- File Name: hdl_prj/hdlsrc/audio_mixer/Sine_HDL_Optimized1.vhd
-- Created: 2021-04-21 11:16:35
--
-- Generated by MATLAB 9.9 and HDL Coder 3.17
--
......@@ -10,8 +10,8 @@
 
-- -------------------------------------------------------------
--
-- Module: Sine_HDL_Optimized
-- Source Path: audio_first_sin/ml_audio/Sine HDL Optimized
-- Module: Sine_HDL_Optimized1
-- Source Path: audio_mixer/ml_audio/Sine HDL Optimized1
-- Hierarchy Level: 1
--
-- -------------------------------------------------------------
......@@ -20,14 +20,14 @@ USE IEEE.std_logic_1164.ALL;
USE IEEE.numeric_std.ALL;
USE work.ml_audio_pkg.ALL;
 
ENTITY Sine_HDL_Optimized IS
ENTITY Sine_HDL_Optimized1 IS
PORT( u : IN std_logic_vector(15 DOWNTO 0); -- ufix16_En16
x : OUT std_logic_vector(15 DOWNTO 0) -- sfix16_En14
);
END Sine_HDL_Optimized;
END Sine_HDL_Optimized1;
 
 
ARCHITECTURE rtl OF Sine_HDL_Optimized IS
ARCHITECTURE rtl OF Sine_HDL_Optimized1 IS
 
-- Constants
CONSTANT Look_Up_Table_data : vector_of_signed16(0 TO 65535) :=
matlab/audio/hdl_prj/hdlsrc/audio_first_sin/ml_audio.vhd → matlab/audio/hdl_prj/hdlsrc/audio_mixer/ml_audio.vhd
View file @ 063f1c58
-- -------------------------------------------------------------
--
-- File Name: hdl_prj/hdlsrc/audio_first_sin/ml_audio.vhd
-- Created: 2021-04-14 10:22:39
-- File Name: hdl_prj/hdlsrc/audio_mixer/ml_audio.vhd
-- Created: 2021-04-21 11:16:35
--
-- Generated by MATLAB 9.9 and HDL Coder 3.17
--
......@@ -30,7 +30,7 @@
-- -------------------------------------------------------------
--
-- Module: ml_audio
-- Source Path: audio_first_sin/ml_audio
-- Source Path: audio_mixer/ml_audio
-- Hierarchy Level: 0
--
-- -------------------------------------------------------------
......@@ -53,48 +53,57 @@ END ml_audio;
ARCHITECTURE rtl OF ml_audio IS
-- Component Declarations
COMPONENT Sine_HDL_Optimized
COMPONENT Sine_HDL_Optimized2
PORT( u : IN std_logic_vector(15 DOWNTO 0); -- ufix16_En16
x : OUT std_logic_vector(15 DOWNTO 0) -- sfix16_En14
);
END COMPONENT;
COMPONENT Sine_HDL_Optimized1
PORT( u : IN std_logic_vector(15 DOWNTO 0); -- ufix16_En16
x : OUT std_logic_vector(15 DOWNTO 0) -- sfix16_En14
);
END COMPONENT;
-- Component Configuration Statements
FOR ALL : Sine_HDL_Optimized
USE ENTITY work.Sine_HDL_Optimized(rtl);
FOR ALL : Sine_HDL_Optimized2
USE ENTITY work.Sine_HDL_Optimized2(rtl);
FOR ALL : Sine_HDL_Optimized1
USE ENTITY work.Sine_HDL_Optimized1(rtl);
-- Signals
SIGNAL enb : std_logic;
SIGNAL audio_i_signed : signed(15 DOWNTO 0); -- sfix16_En15
SIGNAL switches_i_unsigned : unsigned(9 DOWNTO 0); -- ufix10_En10
SIGNAL Data_Type_Conversion_out1 : unsigned(15 DOWNTO 0); -- ufix16_En16
SIGNAL Constant2_out1 : unsigned(15 DOWNTO 0); -- ufix16_En16
SIGNAL Delay2_out1 : unsigned(15 DOWNTO 0); -- ufix16_En16
SIGNAL Sum_out1 : unsigned(15 DOWNTO 0); -- ufix16_En16
SIGNAL Delay_out1 : signed(15 DOWNTO 0); -- sfix16_En15
SIGNAL Gain_cast : signed(31 DOWNTO 0); -- sfix32_En30
SIGNAL Gain_out1 : signed(15 DOWNTO 0); -- sfix16_En15
SIGNAL Sum1_out1 : unsigned(15 DOWNTO 0); -- ufix16_En16
SIGNAL Constant1_out1 : unsigned(15 DOWNTO 0); -- ufix16_En16
SIGNAL Delay1_out1 : unsigned(15 DOWNTO 0); -- ufix16_En16
SIGNAL Sum2_out1 : unsigned(15 DOWNTO 0); -- ufix16_En16
SIGNAL Sine : std_logic_vector(15 DOWNTO 0); -- ufix16
SIGNAL Sine_signed : signed(15 DOWNTO 0); -- sfix16_En14
SIGNAL Gain1_cast : signed(31 DOWNTO 0); -- sfix32_En29
SIGNAL Gain1_out1 : signed(15 DOWNTO 0); -- sfix16_En15
SIGNAL Sum1_out1 : signed(15 DOWNTO 0); -- sfix16_En15
SIGNAL Sine_1 : std_logic_vector(15 DOWNTO 0); -- ufix16
SIGNAL Sine_signed_1 : signed(15 DOWNTO 0); -- sfix16_En14
SIGNAL Product_out1 : signed(31 DOWNTO 0); -- sfix32_En28
SIGNAL Data_Type_Conversion_out1 : signed(15 DOWNTO 0); -- sfix16_En15
SIGNAL Delay3_out1 : signed(15 DOWNTO 0); -- sfix16_En15
BEGIN
u_Sine_HDL_Optimized : Sine_HDL_Optimized
u_Sine_HDL_Optimized2 : Sine_HDL_Optimized2
PORT MAP( u => std_logic_vector(Delay2_out1), -- ufix16_En16
x => Sine -- sfix16_En14
);
audio_i_signed <= signed(audio_i);
enb <= clk_enable;
u_Sine_HDL_Optimized1 : Sine_HDL_Optimized1
PORT MAP( u => std_logic_vector(Delay1_out1), -- ufix16_En16
x => Sine_1 -- sfix16_En14
);
switches_i_unsigned <= unsigned(switches_i);
Constant2_out1 <= to_unsigned(16#1000#, 16);
Data_Type_Conversion_out1 <= switches_i_unsigned & '0' & '0' & '0' & '0' & '0' & '0';
enb <= clk_enable;
Sum_out1 <= Data_Type_Conversion_out1 + Delay2_out1;
Sum1_out1 <= Constant2_out1 + Delay2_out1;
Delay2_process : PROCESS (clk, rst_n)
BEGIN
......@@ -102,33 +111,35 @@ BEGIN
Delay2_out1 <= to_unsigned(16#0000#, 16);
ELSIF clk'EVENT AND clk = '1' THEN
IF enb = '1' THEN
Delay2_out1 <= Sum_out1;
Delay2_out1 <= Sum1_out1;
END IF;
END IF;
END PROCESS Delay2_process;
Delay_process : PROCESS (clk, rst_n)
Constant1_out1 <= to_unsigned(16#1555#, 16);
Sum2_out1 <= Constant1_out1 + Delay1_out1;
Delay1_process : PROCESS (clk, rst_n)
BEGIN
IF rst_n = '0' THEN
Delay_out1 <= to_signed(16#0000#, 16);
Delay1_out1 <= to_unsigned(16#0000#, 16);
ELSIF clk'EVENT AND clk = '1' THEN
IF enb = '1' THEN
Delay_out1 <= audio_i_signed;
Delay1_out1 <= Sum2_out1;
END IF;
END IF;
END PROCESS Delay_process;
END PROCESS Delay1_process;
Gain_cast <= resize(Delay_out1 & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0', 32);
Gain_out1 <= Gain_cast(30 DOWNTO 15);
Sine_signed <= signed(Sine);
Gain1_cast <= resize(Sine_signed & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0', 32);
Gain1_out1 <= Gain1_cast(29 DOWNTO 14);
Sine_signed_1 <= signed(Sine_1);
Product_out1 <= Sine_signed * Sine_signed_1;
Sum1_out1 <= Gain_out1 + Gain1_out1;
Data_Type_Conversion_out1 <= Product_out1(28 DOWNTO 13);
Delay3_process : PROCESS (clk, rst_n)
BEGIN
......@@ -136,7 +147,7 @@ BEGIN
Delay3_out1 <= to_signed(16#0000#, 16);
ELSIF clk'EVENT AND clk = '1' THEN
IF enb = '1' THEN
Delay3_out1 <= Sum1_out1;
Delay3_out1 <= Data_Type_Conversion_out1;
END IF;
END IF;
END PROCESS Delay3_process;
......
matlab/audio/hdl_prj/hdlsrc/audio_first_sin/ml_audio_compile.do → matlab/audio/hdl_prj/hdlsrc/audio_mixer/ml_audio_compile.do
View file @ 063f1c58
vlib work
vcom ml_audio_pkg.vhd
vcom Sine_HDL_Optimized.vhd
vcom Sine_HDL_Optimized1.vhd
vcom Sine_HDL_Optimized2.vhd
vcom ml_audio.vhd
matlab/audio/hdl_prj/hdlsrc/audio_mixer/ml_audio_map.txt 0 → 100644
View file @ 063f1c58
--> ml_audio_pkg
audio_mixer/ml_audio/Sine HDL Optimized1 --> Sine_HDL_Optimized1
audio_mixer/ml_audio/Sine HDL Optimized2 --> Sine_HDL_Optimized2
audio_mixer/ml_audio --> ml_audio
matlab/audio/hdl_prj/hdlsrc/audio_first_sin/ml_audio_pkg.vhd → matlab/audio/hdl_prj/hdlsrc/audio_mixer/ml_audio_pkg.vhd
View file @ 063f1c58
-- -------------------------------------------------------------
--
-- File Name: hdl_prj/hdlsrc/audio_first_sin/ml_audio_pkg.vhd
-- Created: 2021-04-14 10:22:39
-- File Name: hdl_prj/hdlsrc/audio_mixer/ml_audio_pkg.vhd
-- Created: 2021-04-21 11:16:35
--
-- Generated by MATLAB 9.9 and HDL Coder 3.17
--
......
matlab/audio/hdl_prj/hdlsrc/audio_first_sin/ml_audio_report.html → matlab/audio/hdl_prj/hdlsrc/audio_mixer/ml_audio_report.html
View file @ 063f1c58
<!DOCTYPE HTML>
<html xmlns="http://www.w3.org/1999/xhtml" itemscope itemtype="https://www.mathworks.com/help/schema/MathWorksDocPage">
<head>
<title>HDL Check Report for 'audio_first_sin/ml_audio'</title>
<title>HDL Check Report for 'audio_mixer/ml_audio'</title>
<meta http-equiv="Content-Type" content="text/html; charset=utf-8">
<script type="text/javascript" src="file:///opt/MATLAB/R2020b/toolbox/hdlcoder/hdlcommon/js_css/jquery-1.7.1.js"></script>
......@@ -46,9 +46,9 @@
<div class="container_192">
<div class="grid_192">
<div class="page_container"><div class="content_frame">
<h1>HDL Code Generation Check Report for 'audio_first_sin/ml_audio'
<a href="matlab:open_system('audio_first_sin/ml_audio');">open model 'audio_first_sin/ml_audio'</a><BR>
Generated on 2021-04-14 10:22:40</h1>
<h1>HDL Code Generation Check Report for 'audio_mixer/ml_audio'
<a href="matlab:open_system('audio_mixer/ml_audio');">open model 'audio_mixer/ml_audio'</a><BR>
Generated on 2021-04-21 11:16:36</h1>
<H2>No messages, warnings, or errors were found.</H2><BR>
<BR><BR> </div></div></div></div>
<div class="grid_192">
......
matlab/audio/slprj/modeladvisor/HDLAdv_/audio_first_sin/1/report.html → matlab/audio/slprj/modeladvisor/HDLAdv_/audio_mixer/1/report.html
View file @ 063f1c58
......@@ -3,7 +3,7 @@
<head>
<meta http-equiv="X-UA-Compatible" content="IE=8" />
<meta http-equiv="Content-Type" content="text/html; charset=utf-8"/>
<title>Model Advisor Report for 'audio_first_sin/ml_audio'</title>
<title>Model Advisor Report for 'audio_mixer/ml_audio'</title>
<style type="text/css">
<!--
@media screen {
......@@ -703,11 +703,11 @@ function expandCollapseAllOnLoad(){
</span>
<!-- mdladv_ignore_start --><div id="Container"><!-- mdladv_ignore_finish -->
<!-- mdladv_ignore_start --><div class="ReportContent" id="audio_first_sin/ml_audio"><!-- mdladv_ignore_finish --><table class="AdvTableNoBorder" width="100%" border="0">
<!-- mdladv_ignore_start --><div class="ReportContent" id="audio_mixer/ml_audio"><!-- mdladv_ignore_finish --><table class="AdvTableNoBorder" width="100%" border="0">
<tr>
<td colspan="2" align="center">
<b>
Model Advisor Report - <font color="#800000">audio_first_sin.slx</font>
Model Advisor Report - <font color="#800000">audio_mixer.slx</font>
</b>
</td>
......@@ -722,7 +722,7 @@ Simulink version: <font color="#800000">10.2</font>
</td>
<td align="right" valign="top">
<b>
Model version: <font color="#800000">5.7</font>
Model version: <font color="#800000">5.9</font>
</b>
</td>
......@@ -731,13 +731,13 @@ Model version: <font color="#800000">5.7</font>
<tr>
<td align="left" valign="top">
<b>
System: <font color="#800000">audio_first_sin/ml_audio</font>
System: <font color="#800000">audio_mixer/ml_audio</font>
</b>
</td>
<td align="right" valign="top">
<b>
Current run: <font color="#800000">14-Apr-2021 10:21:55</font>
Current run: <font color="#800000">21-Apr-2021 11:15:46</font>
</b>
</td>
......@@ -805,7 +805,7 @@ Total
<!-- mdladv_ignore_start --><img src="data:image/png;base64,iVBORw0KGgoAAAANSUhEUgAAABAAAAAQCAYAAAAf8/9hAAAACXBIWXMAAAsTAAALEwEAmpwYAAAKT2lDQ1BQaG90b3Nob3AgSUNDIHByb2ZpbGUAAHjanVNnVFPpFj333vRCS4iAlEtvUhUIIFJCi4AUkSYqIQkQSoghodkVUcERRUUEG8igiAOOjoCMFVEsDIoK2AfkIaKOg6OIisr74Xuja9a89+bN/rXXPues852zzwfACAyWSDNRNYAMqUIeEeCDx8TG4eQuQIEKJHAAEAizZCFz/SMBAPh+PDwrIsAHvgABeNMLCADATZvAMByH/w/qQplcAYCEAcB0kThLCIAUAEB6jkKmAEBGAYCdmCZTAKAEAGDLY2LjAFAtAGAnf+bTAICd+Jl7AQBblCEVAaCRACATZYhEAGg7AKzPVopFAFgwABRmS8Q5ANgtADBJV2ZIALC3AMDOEAuyAAgMADBRiIUpAAR7AGDIIyN4AISZABRG8lc88SuuEOcqAAB4mbI8uSQ5RYFbCC1xB1dXLh4ozkkXKxQ2YQJhmkAuwnmZGTKBNA/g88wAAKCRFRHgg/P9eM4Ors7ONo62Dl8t6r8G/yJiYuP+5c+rcEAAAOF0ftH+LC+zGoA7BoBt/qIl7gRoXgugdfeLZrIPQLUAoOnaV/Nw+H48PEWhkLnZ2eXk5NhKxEJbYcpXff5nwl/AV/1s+X48/Pf14L7iJIEyXYFHBPjgwsz0TKUcz5IJhGLc5o9H/LcL//wd0yLESWK5WCoU41EScY5EmozzMqUiiUKSKcUl0v9k4t8s+wM+3zUAsGo+AXuRLahdYwP2SycQWHTA4vcAAPK7b8HUKAgDgGiD4c93/+8//UegJQCAZkmScQAAXkQkLlTKsz/HCAAARKCBKrBBG/TBGCzABhzBBdzBC/xgNoRCJMTCQhBCCmSAHHJgKayCQiiGzbAdKmAv1EAdNMBRaIaTcA4uwlW4Dj1wD/phCJ7BKLyBCQRByAgTYSHaiAFiilgjjggXmYX4IcFIBBKLJCDJiBRRIkuRNUgxUopUIFVIHfI9cgI5h1xGupE7yAAygvyGvEcxlIGyUT3UDLVDuag3GoRGogvQZHQxmo8WoJvQcrQaPYw2oefQq2gP2o8+Q8cwwOgYBzPEbDAuxsNCsTgsCZNjy7EirAyrxhqwVqwDu4n1Y8+xdwQSgUXACTYEd0IgYR5BSFhMWE7YSKggHCQ0EdoJNwkDhFHCJyKTqEu0JroR+cQYYjIxh1hILCPWEo8TLxB7iEPENyQSiUMyJ7mQAkmxpFTSEtJG0m5SI+ksqZs0SBojk8naZGuyBzmULCAryIXkneTD5DPkG+Qh8lsKnWJAcaT4U+IoUspqShnlEOU05QZlmDJBVaOaUt2ooVQRNY9aQq2htlKvUYeoEzR1mjnNgxZJS6WtopXTGmgXaPdpr+h0uhHdlR5Ol9BX0svpR+iX6AP0dwwNhhWDx4hnKBmbGAcYZxl3GK+YTKYZ04sZx1QwNzHrmOeZD5lvVVgqtip8FZHKCpVKlSaVGyovVKmqpqreqgtV81XLVI+pXlN9rkZVM1PjqQnUlqtVqp1Q61MbU2epO6iHqmeob1Q/pH5Z/YkGWcNMw09DpFGgsV/jvMYgC2MZs3gsIWsNq4Z1gTXEJrHN2Xx2KruY/R27iz2qqaE5QzNKM1ezUvOUZj8H45hx+Jx0TgnnKKeX836K3hTvKeIpG6Y0TLkxZVxrqpaXllirSKtRq0frvTau7aedpr1Fu1n7gQ5Bx0onXCdHZ4/OBZ3nU9lT3acKpxZNPTr1ri6qa6UbobtEd79up+6Ynr5egJ5Mb6feeb3n+hx9L/1U/W36p/VHDFgGswwkBtsMzhg8xTVxbzwdL8fb8VFDXcNAQ6VhlWGX4YSRudE8o9VGjUYPjGnGXOMk423GbcajJgYmISZLTepN7ppSTbmmKaY7TDtMx83MzaLN1pk1mz0x1zLnm+eb15vft2BaeFostqi2uGVJsuRaplnutrxuhVo5WaVYVVpds0atna0l1rutu6cRp7lOk06rntZnw7Dxtsm2qbcZsOXYBtuutm22fWFnYhdnt8Wuw+6TvZN9un2N/T0HDYfZDqsdWh1+c7RyFDpWOt6azpzuP33F9JbpL2dYzxDP2DPjthPLKcRpnVOb00dnF2e5c4PziIuJS4LLLpc+Lpsbxt3IveRKdPVxXeF60vWdm7Obwu2o26/uNu5p7ofcn8w0nymeWTNz0MPIQ+BR5dE/C5+VMGvfrH5PQ0+BZ7XnIy9jL5FXrdewt6V3qvdh7xc+9j5yn+M+4zw33jLeWV/MN8C3yLfLT8Nvnl+F30N/I/9k/3r/0QCngCUBZwOJgUGBWwL7+Hp8Ib+OPzrbZfay2e1BjKC5QRVBj4KtguXBrSFoyOyQrSH355jOkc5pDoVQfujW0Adh5mGLw34MJ4WHhVeGP45wiFga0TGXNXfR3ENz30T6RJZE3ptnMU85ry1KNSo+qi5qPNo3ujS6P8YuZlnM1VidWElsSxw5LiquNm5svt/87fOH4p3iC+N7F5gvyF1weaHOwvSFpxapLhIsOpZATIhOOJTwQRAqqBaMJfITdyWOCnnCHcJnIi/RNtGI2ENcKh5O8kgqTXqS7JG8NXkkxTOlLOW5hCepkLxMDUzdmzqeFpp2IG0yPTq9MYOSkZBxQqohTZO2Z+pn5mZ2y6xlhbL+xW6Lty8elQfJa7OQrAVZLQq2QqboVFoo1yoHsmdlV2a/zYnKOZarnivN7cyzytuQN5zvn//tEsIS4ZK2pYZLVy0dWOa9rGo5sjxxedsK4xUFK4ZWBqw8uIq2Km3VT6vtV5eufr0mek1rgV7ByoLBtQFr6wtVCuWFfevc1+1dT1gvWd+1YfqGnRs+FYmKrhTbF5cVf9go3HjlG4dvyr+Z3JS0qavEuWTPZtJm6ebeLZ5bDpaql+aXDm4N2dq0Dd9WtO319kXbL5fNKNu7g7ZDuaO/PLi8ZafJzs07P1SkVPRU+lQ27tLdtWHX+G7R7ht7vPY07NXbW7z3/T7JvttVAVVN1WbVZftJ+7P3P66Jqun4lvttXa1ObXHtxwPSA/0HIw6217nU1R3SPVRSj9Yr60cOxx++/p3vdy0NNg1VjZzG4iNwRHnk6fcJ3/ceDTradox7rOEH0x92HWcdL2pCmvKaRptTmvtbYlu6T8w+0dbq3nr8R9sfD5w0PFl5SvNUyWna6YLTk2fyz4ydlZ19fi753GDborZ752PO32oPb++6EHTh0kX/i+c7vDvOXPK4dPKy2+UTV7hXmq86X23qdOo8/pPTT8e7nLuarrlca7nuer21e2b36RueN87d9L158Rb/1tWeOT3dvfN6b/fF9/XfFt1+cif9zsu72Xcn7q28T7xf9EDtQdlD3YfVP1v+3Njv3H9qwHeg89HcR/cGhYPP/pH1jw9DBY+Zj8uGDYbrnjg+OTniP3L96fynQ89kzyaeF/6i/suuFxYvfvjV69fO0ZjRoZfyl5O/bXyl/erA6xmv28bCxh6+yXgzMV70VvvtwXfcdx3vo98PT+R8IH8o/2j5sfVT0Kf7kxmTk/8EA5jz/GMzLdsAAAAEZ0FNQQAAsY58+1GTAAAAIGNIUk0AAHolAACAgwAA+f8AAIDpAAB1MAAA6mAAADqYAAAXb5JfxUYAAAK2SURBVHjaVJNPaFRXFMZ/b96MmUZGURMyHaoTa0QrRReD4KIlwriRRhPpoi1ddeNG4krFRbAbceOf0qJuSoWWWlooIiKlCSkp1ARksEmpi8GSQjKJUSYk/p1J5r17vi7ee609cFf3+33n3HvO8SgdJYn+oZFODw4DBxB7hYoSMzJVZBo12a2fzr9X55XwEoOBoZGyYNCDfgEyIQkMzIRkBKupYXN89svVg8OJgU+hxMDQSBk45+GVJSJQQk5IYGbIhIfrcSF78ttrC3P336wC+ANXlzqBs0A5EgtkSMJMMRxXFN11mSm/pr05sTSXX0qBDkvqj0Qx6MBC/QuVt77Pp/uvkV9bxJzhZ5r7cx2LHwGZtMQBGUhRmSaB/Zd9rb+OD98+zub1Paxbs5FjNw9GJm2NXuDLtMz2RuUC8VsVG2T9di4fGqaQ6+ZubZTvJ69goWEy/PTKTmBDykxFc0LOOLHvMu+8cQjnjDRtXDsyTiHXTaU2xpmfP6EyO4Y5Q6EgFXQBubRMM+a0zcx4t9hHb3c/j5/Ncbr3Cpva80w9HOfU7Q8IwhbmonaagQv8x0A25ZxVzAxz4tupS0jG5323eT1XZHL+DoM3+mgFLZwzEp2c0WpmqsBKypxGLb785vcLfH3vAgCT878xeKMvAp1FM5Ecg5Wn6+8Bz1Pm3K1W0xu2UFhofDf5BX8t/snFsZPxDMSZzaLOSKw2suOPHuyaAJb9v+c+bmze/aBuTnuE6wrCgJt/fMVyox6NcNwRCTARtjLV5fkt1+vTb1WAmk+hxOzUjumOrTMLkuVTXtCdgMmHJTux2nxt/Ml88Xptat+vwCzw0qdQAmCh2lPNZBsTJluU8ySsDazdhf6j1sts5cVS548P75d+qE/vrMTw8v+28ZXIAB3ABiAHZIEV4HkMLQJBIv5nAPq180UQOlmCAAAAAElFTkSuQmCC" />&#160;<!-- mdladv_ignore_finish --><span class="CheckHeading" id="Heading_com.mathworks.HDL.GenerateHDLCodeAndReport">
3.2. Generate RTL Code and Testbench</span>
<!-- mdladv_ignore_start --><!-- mdladv_ignore_finish --><!-- mdladv_ignore_start --><!-- mdladv_ignore_finish --></div>
<!-- mdladv_ignore_start --><div class="subsection"><!-- mdladv_ignore_finish --><p />### Generating HDL for 'audio_first_sin/ml_audio'.<p />### Using the config set for model <a href="matlab:configset.showParameterGroup('audio_first_sin', { 'HDL Code Generation' } )">audio_first_sin</a> for HDL code generation parameters.<p />### Starting HDL check.<p />[Warning: '<a href="matlab:slprivate('open_and_hilite_port_hyperlink', 'hilite', ['audio_first_sin/Scope'], 'Inport', 1);">Input Port 1</a>' of '<a href="matlab:open_and_hilite_hyperlink ('audio_first_sin/Scope','error')">audio_first_sin/Scope</a>' is not connected.] <p />[> In slhdlcoder.SimulinkConnection/initModel<p />In slhdlcoder.HDLCoder/createPir<p />In slhdlcoder.HDLCoder/checkhdl<p />In slhdlcoder.HDLCoder/runCheckHdlAndPirFrontEnd<p />In slhdlcoder.HDLCoder/makehdl<p />In downstream.DownstreamIntegrationDriver/runGenerateRTLCodeAndTestbench<p />In runGenerateRTLCodeAndTestbench<p />In Simulink.ModelAdvisor/executeCheckCallbackFct<p />In Simulink.ModelAdvisor/run<p />In Simulink.ModelAdvisor/runCheck<p />In ModelAdvisor.Node/runTaskAdvisor<p />In ModelAdvisor.Node/runToFail] <p />### Begin VHDL Code Generation for 'audio_first_sin'.<p />### Working on audio_first_sin/ml_audio/Sine HDL Optimized as <a href="matlab:edit('hdl_prj/hdlsrc/audio_first_sin/Sine_HDL_Optimized.vhd')">hdl_prj/hdlsrc/audio_first_sin/Sine_HDL_Optimized.vhd</a>.<p />### Working on audio_first_sin/ml_audio as <a href="matlab:edit('hdl_prj/hdlsrc/audio_first_sin/ml_audio.vhd')">hdl_prj/hdlsrc/audio_first_sin/ml_audio.vhd</a>.<p />### Generating package file <a href="matlab:edit('hdl_prj/hdlsrc/audio_first_sin/ml_audio_pkg.vhd')">hdl_prj/hdlsrc/audio_first_sin/ml_audio_pkg.vhd</a>.<p />### Creating HDL Code Generation Check Report <a href="matlab:web('file:///home/caeuser/Projects/vhdl/vlsilab21_garrity_mikschl/matlab/hdl_prj/hdlsrc/audio_first_sin/ml_audio_report.html')">ml_audio_report.html</a><p />### HDL check for 'audio_first_sin' complete with 0 errors, 0 warnings, and 0 messages.<p />### HDL code generation complete.<p /><p /><br /><br /><br /><font color="Green">
<!-- mdladv_ignore_start --><div class="subsection"><!-- mdladv_ignore_finish --><p />### Generating HDL for 'audio_mixer/ml_audio'.<p />### Using the config set for model <a href="matlab:configset.showParameterGroup('audio_mixer', { 'HDL Code Generation' } )">audio_mixer</a> for HDL code generation parameters.<p />### Starting HDL check.<p />[Warning: '<a href="matlab:slprivate('open_and_hilite_port_hyperlink', 'hilite', ['audio_mixer/Scope'], 'Inport', 1);">Input Port 1</a>' of '<a href="matlab:open_and_hilite_hyperlink ('audio_mixer/Scope','error')">audio_mixer/Scope</a>' is not connected.] <p />[> In slhdlcoder.SimulinkConnection/initModel<p />In slhdlcoder.HDLCoder/createPir<p />In slhdlcoder.HDLCoder/checkhdl<p />In slhdlcoder.HDLCoder/runCheckHdlAndPirFrontEnd<p />In slhdlcoder.HDLCoder/makehdl<p />In downstream.DownstreamIntegrationDriver/runGenerateRTLCodeAndTestbench<p />In runGenerateRTLCodeAndTestbench<p />In Simulink.ModelAdvisor/executeCheckCallbackFct<p />In Simulink.ModelAdvisor/run<p />In Simulink.ModelAdvisor/runCheck<p />In ModelAdvisor.Node/runTaskAdvisor<p />In ModelAdvisor.Node/runToFail] <p />[Warning: '<a href="matlab:slprivate('open_and_hilite_port_hyperlink', 'hilite', ['audio_mixer/ml_audio/switches_i'], 'Outport', 1);">Output Port 1</a>' of '<a href="matlab:open_and_hilite_hyperlink ('audio_mixer/ml_audio/switches_i','error')">audio_mixer/ml_audio/switches_i</a>' is not connected.] <p />[> In slhdlcoder.SimulinkConnection/initModel<p />In slhdlcoder.HDLCoder/createPir<p />In slhdlcoder.HDLCoder/checkhdl<p />In slhdlcoder.HDLCoder/runCheckHdlAndPirFrontEnd<p />In slhdlcoder.HDLCoder/makehdl<p />In downstream.DownstreamIntegrationDriver/runGenerateRTLCodeAndTestbench<p />In runGenerateRTLCodeAndTestbench<p />In Simulink.ModelAdvisor/executeCheckCallbackFct<p />In Simulink.ModelAdvisor/run<p />In Simulink.ModelAdvisor/runCheck<p />In ModelAdvisor.Node/runTaskAdvisor<p />In ModelAdvisor.Node/runToFail] <p />[Warning: '<a href="matlab:slprivate('open_and_hilite_port_hyperlink', 'hilite', ['audio_mixer/ml_audio/audio_i'], 'Outport', 1);">Output Port 1</a>' of '<a href="matlab:open_and_hilite_hyperlink ('audio_mixer/ml_audio/audio_i','error')">audio_mixer/ml_audio/audio_i</a>' is not connected.] <p />[> In slhdlcoder.SimulinkConnection/initModel<p />In slhdlcoder.HDLCoder/createPir<p />In slhdlcoder.HDLCoder/checkhdl<p />In slhdlcoder.HDLCoder/runCheckHdlAndPirFrontEnd<p />In slhdlcoder.HDLCoder/makehdl<p />In downstream.DownstreamIntegrationDriver/runGenerateRTLCodeAndTestbench<p />In runGenerateRTLCodeAndTestbench<p />In Simulink.ModelAdvisor/executeCheckCallbackFct<p />In Simulink.ModelAdvisor/run<p />In Simulink.ModelAdvisor/runCheck<p />In ModelAdvisor.Node/runTaskAdvisor<p />In ModelAdvisor.Node/runToFail] <p />[Warning: Parameter precision loss occurred for 'Value' of '<a href="matlab:open_and_hilite_hyperlink ('audio_mixer/ml_audio/Constant1','error')">audio_mixer/ml_audio/Constant1</a>'. The parameter's value cannot be<p />represented exactly using the run-time data type. A small quantization error has occurred. To disable this warning or error, in<p />the Configuration Parameters > Diagnostics > Data Validity pane, set the 'Detect precision loss' option in the Parameters group<p />to 'none'.<p />Suggested Actions:<p /> • - <a href="matlab:Simulink.SuppressedDiagnostic({'audio_mixer/ml_audio/Constant1'},'SimulinkFixedPoint:util:fxpParameterPrecisionLoss');">Suppress</a><p />] <p />[> In slhdlcoder.SimulinkConnection/initModel<p />In slhdlcoder.HDLCoder/createPir<p />In slhdlcoder.HDLCoder/checkhdl<p />In slhdlcoder.HDLCoder/runCheckHdlAndPirFrontEnd<p />In slhdlcoder.HDLCoder/makehdl<p />In downstream.DownstreamIntegrationDriver/runGenerateRTLCodeAndTestbench<p />In runGenerateRTLCodeAndTestbench<p />In Simulink.ModelAdvisor/executeCheckCallbackFct<p />In Simulink.ModelAdvisor/run<p />In Simulink.ModelAdvisor/runCheck<p />In ModelAdvisor.Node/runTaskAdvisor<p />In ModelAdvisor.Node/runToFail] <p />### Begin VHDL Code Generation for 'audio_mixer'.<p />### Working on audio_mixer/ml_audio/Sine HDL Optimized1 as <a href="matlab:edit('hdl_prj/hdlsrc/audio_mixer/Sine_HDL_Optimized1.vhd')">hdl_prj/hdlsrc/audio_mixer/Sine_HDL_Optimized1.vhd</a>.<p />### Working on audio_mixer/ml_audio/Sine HDL Optimized2 as <a href="matlab:edit('hdl_prj/hdlsrc/audio_mixer/Sine_HDL_Optimized2.vhd')">hdl_prj/hdlsrc/audio_mixer/Sine_HDL_Optimized2.vhd</a>.<p />### Working on audio_mixer/ml_audio as <a href="matlab:edit('hdl_prj/hdlsrc/audio_mixer/ml_audio.vhd')">hdl_prj/hdlsrc/audio_mixer/ml_audio.vhd</a>.<p />### Generating package file <a href="matlab:edit('hdl_prj/hdlsrc/audio_mixer/ml_audio_pkg.vhd')">hdl_prj/hdlsrc/audio_mixer/ml_audio_pkg.vhd</a>.<p />### Creating HDL Code Generation Check Report <a href="matlab:web('file:///home/caeuser/Projects/vhdl/vlsilab21_garrity_mikschl/matlab/audio/hdl_prj/hdlsrc/audio_mixer/ml_audio_report.html')">ml_audio_report.html</a><p />### HDL check for 'audio_mixer' complete with 0 errors, 0 warnings, and 0 messages.<p />### HDL code generation complete.<p /><p /><br /><br /><br /><font color="Green">
Passed
</font>
Generated HDL code. Click on the file name link(s) to open the generated code in the editor<br /><!-- mdladv_ignore_start --><!-- inputparam_section_start --><H5><b>
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